Beyond Moore's Law: the interconnect era

COMPUTING IN SCIENCE & ENGINEERING In the 20th century, mainstream electronics evolved from vacuum tubes and discrete copper wires to individual transistors and batch-fabricated, printed wiring boards to its current form, which integrates more than a billion transistors and copper interconnections in a single silicon chip. Until the past decade, designers benignly neglected the electrical performance of wires or metal interconnections, beyond a cursory accounting for their parasitic capacitance. They effectively addressed this problem simply by increasing transistor channel width to provide larger drive currents, and thus enable transistor-level circuit performance. Unfortunately, this simple fix is no longer adequate for two salient reasons: both interconnect latency and energy dissipation now tend to dominate key metrics of transistor performance. For example, for current, state-of-the-art 100-nm technology, the latency of a 1-mm-long interconnect benchmark is approximately six times larger than that of a corresponding transistor. Moreover, the energy dissipation associated with a benchmark interconnect’s binary transition is approximately five times larger than that of a corresponding transistor. This “tyranny of interconnects” escalates rapidly for future generations of silicon technology. Consequently, in the nearand mediumterm future, exponential increases in transistors per chip—as Moore’s law eloquently projects— will necessarily emphasize advances in interconnect technology. These advances will be extremely diverse and will include new interconnect materials and processes, optimal reverse scaling, microarchitectures that shorten interconnects, 3D structures and I/O enhancements, interchip optical interconnects, and more powerful computeraided design tools for chip layout and interconnect routing. Here, I discuss these improvements, which are likely to evolve for decades. I also discuss the logic behind my prediction that any revolutionary technology that supplants silicon must be interconnect-centric. First, however, let’s review Moore’s law and what its ultimate limits mean for the future of interconnect technology.